1. Field of the Invention
The present invention relates to a semiconductor element provided with a layer of intermetallic compound and a fabricating method thereof.
2. Description of Related Art
In surface mount technology (SMT) of a semiconductor element, it is very important to implement soldering process with reliability. In the SMT, solder that has been largely used is eutectic alloy of tin (Sn) and lead (Pb) (Sn: Pb=63:37% by weight). In addition, so as to cope with finer pitches, ternary alloy of composition of Snxe2x80x94Pbxe2x80x94Bi (8% by weight) has been used too.
The primary reason for employing alloys as solder material is that, not mentioning to a large strength and corrosion resistance, alloys have a lower melting temperature compared with those of component simple elements. The alloys can be roughly distinguished into three categories of solid solutions, eutectic compounds and intermetallic compounds.
The solders that are provided in JIS Z 3282 include, other than the aforementioned solders of compositions of Snxe2x80x94Pb and Snxe2x80x94Pbxe2x80x94Bi, solders of compositions of such as Bixe2x80x94Sn, Snxe2x80x94Pbxe2x80x94Ag, Snxe2x80x94Ag, Snxe2x80x94Sb, Pbxe2x80x94Ag and Pbxe2x80x94Agxe2x80x94Sn.
Among these solders, lead based solders are gradually declining in use. That is, Pb has a plurality of radioisotopes. These isotopes are intermediate or final products of decay series of uranium (U) or thorium (Th), and accompany xcex1-decay that emits He atoms. Accordingly, in the solders, xcex1-rays inevitably appear. The xcex1-rays, upon reaching a CMOS element for instance, cause soft error problems to occur. Further, Pb, upon flowing out into soil, might be eluted due to acid rain to have adverse affect on the environment. From these reasons, use of solders containing lead (Pb) is declining.
Instead of these Pb based solders, Sn based solders (Snxe2x80x94Ag solder for instance) that do not contain Pb are considered promising.
A method for fabricating a semiconductor device in which semiconductor element is surface-mounted with Snxe2x80x94Ag based solder will be explained with reference to FIGS. 19 to 23.
First, as shown in FIG. 19, after forming an aluminum electrode pad 22 on a semiconductor substrate 21 consisting of silicon, while leaving an opening at a center portion of the aluminum electrode pad 22, passivation is implemented to 20 form a passivation film 23. Then, as shown in FIG. 20, films of titanium (Ti) 24, nickel (Ni) 25 and palladium (Pd) 26 are sequentially stacked in this order to form a barrier metal layer 27.
Then, as shown in FIG. 21, resist 28 is coated on the barrier metal layer 27 and a portion above the aluminum electrode pad 22 is opened. Thereafter, in the opening a layer of Snxe2x80x94Ag solder 29 is formed.
Next, as shown in FIG. 22, the resist 28 is removed and the barrier metal layer 27 is etched. Thereafter, as shown in FIG. 23, the layer 29 of Snxe2x80x94Ag solder is reflowed to form a protruded electrode (bump) 30. Then, the semiconductor substrate 21 is diced to form semiconductor chips. The semiconductor chip is mounted on a wiring board (a printed circuit board) by use of flip-chip mounting method to produce a semiconductor device.
However, in general, such solders as Snxe2x80x94Ag based ones that are free from Pb contain much Sn compared with the Snxe2x80x94Pb solder. Accordingly, when left in high temperature service circumstances, the barrier metal layer deteriorates sooner. That is, since Sn in the solder tends to intrude and diffuse into the barrier metal layer (Ni layer), the barrier metal layer tends to deteriorate to cause lowering of reliability of a solder joint between the semiconductor element (chip) and the wiring board. This is a problem.
Further, there is a method in which Cu or Ni as the barrier metal is plated thicker to solve the aforementioned problems. However, in this method, number of step increases to cause problems.
Thus, so far, with solders that do not contain lead (Pb), highly reliable solder joint has not been formed.
The present invention has been carried out to solve these problems. The object of the present invention is to provide a semiconductor element of high reliability and a fabricating method thereof, in which solders that do not contain Pb are used as joining means.
A first aspect of the present invention is a semiconductor element. The semiconductor element comprises a semiconductor substrate, a wiring pad formed on the semiconductor substrate, a layer of barrier metal formed on the wiring pad, an intermetallic compound Ag3Sn formed on the barrier metal layer, and a protruded electrode. The protruded electrode consists of a low-melting metal formed on the intermetallic compound Ag3Sn.
In the first aspect, the intermetallic compound Ag3Sn is formed in a layer or segregated in particles.
Further, in the present first aspect, the layer of barrier metal is selected from single layers and laminate layers of titanium (Ti), chromium (Cr), copper (Cu), nickel (Ni), palladium (Pd), gold (Au), tungsten (W), titanium nitride (TiN), tantalum (Ta), niobium (Nb), tantalum nitride (TaN), mixtures thereof and compounds thereof. In particular, due to excellent adherence with the intermetallic compound Ag3Sn, a laminate layer stacked titanium (Ti) film, nickel (Ni) film and palladium (Pd) film in this order is preferably used.
The low-melting metal is selected from tin (Sn), silver (Ag), bismuth (Bi), zinc (Zn), indium (In), antimony (Sb), copper (Cu) and germanium (Ge), mixtures thereof and compounds thereof. To be specific, binary mixtures (alloys) such as eutectic Snxe2x80x94Ag or the like can be cited, and ternary alloys such as Snxe2x80x94Agxe2x80x94Bi or the like also can be used.
A second aspect of the present invention is a fabricating method of a semiconductor element. The present method comprises the steps of forming a wiring pad on a semiconductor substrate, of forming a barrier metal layer on the wiring pad, of forming a layer of intermetallic compound Ag3Sn on the barrier metal layer, and of forming a protruded electrode. The protruded electrode consists of low-melting metal formed on the layer of intermetallic compound Ag3Sn.
In the present fabricating method of the semiconductor element, the layer of barrier metal is selected from single layers and laminate layers of titanium (Ti), chromium (Cr), copper (Cu), nickel (Ni), palladium (Pd), gold (Au), tungsten (W), titanium nitride (TiN), tantalum (Ta), niobium (Nb), tantalum nitride (TaN), mixtures thereof, and compounds thereof. In particular, due to excellent adherence with the intermetallic compound Ag3Sn, a laminate layer stacked titanium (Ti) film, nickel (Ni) film, and palladium (Pd) film in this order is preferably used.
The low-melting metal is selected from tin (Sn), silver (Ag), bismuth (Bi), zinc (Zn), indium (In), antimony (Sb), copper (Cu) and germanium (Ge), mixtures thereof and compounds thereof. To be specific, binary mixtures (alloys) such as eutectic Snxe2x80x94Ag or the like can be cited, and ternary alloys such as Snxe2x80x94Agxe2x80x94Bi or the like also can be used.
A third aspect of the present invention is a fabricating method of the semiconductor element, comprising the steps of forming a wiring pad on a semiconductor substrate, of forming a layer of barrier metal on the wiring pad, of forming a metallic layer containing silver (Ag) on the layer of barrier metal, of forming a layer of low-melting metal containing tin (Sn) on the metallic layer containing Ag and of melting the layer of low-melting metal containing Sn to form a protruded electrode, thereby forming an intermetallic compound Ag3Sn in the neighborhood of an interface of the metallic layer containing Ag and the layer of low-melting metal containing Sn.
In the third aspect, the intermetallic compound Ag3Sn is formed in a layer. That is, when solder containing Sn is used as low-melting metal, during the solder reflow procedures, a lower layer containing Ag is also melted. Accordingly, the layer of intermetallic compound Ag3Sn is formed in the layer containing Ag, that is, between the solder layer and the barrier metal layer.
In addition, in the third aspect of the present invention, the intermetallic compound Ag3Sn can be segregated in particles. By appropriately adjusting thickness of the layer containing Ag and reflow temperature, the intermetallic compound Ag3Sn can be formed in a layer or in particles.
In the third aspect, the layer of barrier metal is selected from single layers and laminate layers of titanium (Ti), chromium (Cr), copper (Cu), nickel (Ni), palladium (Pd), gold (Au), tungsten (W), titanium nitride (TiN), tantalum (Ta), niobium (Nb), tantalum nitride (TaN), mixtures thereof and compounds thereof. In particular, due to excellent adherence with the intermetallic compound Ag3Sn, a laminate layer stacked titanium (Ti) film, nickel (Ni) film, and palladium (Pd) film in this order is preferably used.
Further, the low-melting metal containing Sn is selected from simple Sn and mixtures of Sn and one or more kinds of metals selected from silver (Ag), bismuth (Bi), zinc (zn), indium (In), antimony (Sb), copper (Cu) and germanium (Ge). To be specific, binary mixtures (alloys) such as eutectic Snxe2x80x94Ag or the like can be cited, and ternary alloys such as Snxe2x80x94Agxe2x80x94Bi or the like also can be used.
The protruded electrode in the present invention is formed by implementing plating of the low-melting metal, or by printing paste containing the low-melting metal. When the plating method is used, Ag plating and Sn plating can be separately implemented. Both of the Ag plating and Sn plating, when a plating solution of alkyl-sulfonic acid (salt) is employed, in addition to affecting less adversely on the environment, is compatible to each other during plating, too. Further, in the present invention, the protruded electrode is formed on the semiconductor element side, but can be formed on the wiring board side that is connected to a semiconductor element.
In general, after melting and cooling the Snxe2x80x94Ag solder to solidify, in investigating texture thereof due to electron diffraction analysis, precipitate of Ag3Sn is found to be inevitably contained divided finely and distributed in matrix. According to the third aspect of the present invention, between the barrier metal layer and the low-melting metal layer for instance Snxe2x80x94Ag solder layer, an intermetallic compound AggSn is formed in a layer, or segregated in particles. Accordingly, the barrier metal layer and the low-melting metal layer are compatible to each other and excellent adherence can be obtained therebetween.
According to the present invention, Sn contained in the low-melting metal is suppressed from diffusing into the barrier metal layer, resulting in an improvement of reliability. The intermetallic compound Ag3Sn being prevented from growing coarse in grain size thereof even after high temperature protracted tests and thermal cycle tests, does not deteriorate due to temperature. In addition, in particular, when Pd is used as the barrier metal, due to excellent adherence between Pd and intermetallic compound Ag3Sn and Ag, the Ag layer or the layer containing Ag is not peeled off. Further, since the layer of intermetallic compound Ag3Sn can be formed by use of sputtering method, a film thickness can be easily controlled. In addition to this, the Ag layer, being able to form by use of sputtering or plating, can be easily controlled in the thickness thereof.
The semiconductor element of the present invention is connected to a wiring board of an arbitrary shape through a protruded electrode (bump) consisting of low-melting metal and is sealed by resin or the like to form a semiconductor device (a package). The semiconductor device can be further connected to a motherboard.